
[電子] 寄生電容
The high frequency parasitic effect of MOSFET is emphasis on, included gate resistance, substrate resistance, and parasitic capacitance.
重點讨論MOSFET的高頻寄生參數,包括栅電阻、襯底電阻、寄生電容等。
But there are also some disadvantages, such as the reducing of drain current driving capability and the increasing of parasitic capacitance.
但同時也有一些不足,如漏極驅動能力降低以及寄生電容增大的問題。
A vertical cavity surface emitting laser capable of reducing parasitic capacitance while suppressing power consumption, and a method of manufacturing thereof are provided.
本發明涉及一種垂直腔面發射激光器及其制造方法,該垂直腔面發射激光器能夠減小寄生電容同時抑制功耗。
We insert a parasitic capacitance patch on the rear of the layer in order to adjust the impedance of antenna.
同時在天線臂之間加入了寄生電容,實現阻抗調整的作用。
Effects of the parasitic capacitance on the frequency response of the filter are stu***d.
分析了晶體管的寄生電容對此濾波器頻率特性的影響。
The quasi multiple medium (QMM), based on the direct boundary element method, is a fast algorithm for parasitic capacitance extraction.
虛拟多介質是一種基于直接邊界元的寄生電容快速提取方法。
The LNA design method which absorbs the parasitic capacitance of ESD is introduced and compared with the traditional design method.
同時提出了将ESD的寄生電容吸收到LNA輸入匹配網絡中的設計方式,并與傳統的計算方式做了對比。
A novel configuration of a MOS varactor is designed for good linearity of Kvco, as well as a new digital capacitor controlled array topology with lower parasitic capacitance and lower Ron.
通過改變MOS變容管的接入方法實現了更好的壓控增益線性度,并采用了新的低寄生電容、低導通電阻的數控電容陣列結構來補償工藝變化帶來的頻率變化。
This may be caused by many factors, and the parasitic capacitance of IGBT is proved to be the key by the experiment and the analysis.
通過實驗和理論分析可以證明,其主要起因是IGBT的寄生電容。
The noise performance and impedance matching are optimized with RF input parasitic capacitance in consideration.
在考慮輸入寄生的前提下,對射頻輸入端的阻抗匹配和噪聲性能進行了優化;
The novel LDMOSFET did not degrade the advantage of SOI structure's low leakage current and parasitic capacitance, which also suppressed the self-heating effects and floating body effects.
工藝和性能模拟分析表明,此結構具有SOI器件低洩漏電流和低輸出電容的特性,而且能抑制自加熱效應和浮體效應。
The orthogonal coupling error, non-linear of the drive mode, temperature effect and parasitic capacitance of a fully-symmetrical micro gyroscope are test and analyzed in this paper.
本文針對一種全對稱微機械陀螺,對其正交耦合誤差、驅動非線性、溫度特性以及寄生電容來源進行了測試與分析。
At last, the source of the parasitic capacitance is analyzed. The parasitic capacitance's value is calculated and the model is build.
建立了全對稱微機械陀螺寄生電容模型,分析了陀螺結構中寄生電容的來源并計算了電容值的大小。
A new model has been developed for the determination of the electrode and interconnection parasitic capacitance using moment method and free space Green's function of rectangularsubarea.
本文以矩量法和矩形面元上的自由空間格林函數為基礎,采用多電像法給出一個計算電極,互聯線寄生電容的新模型。
Due to the parasitic capacitance and weak output signal, which is limited by its dimensions, it is difficult to improve the resolution and stability of micro accelerometer efficiently.
在測量矽微電容式加速度傳感器時,由于器件信號的微弱和寄生電容的幹擾,提高加速度的穩定性和分辨率非常困難。
In this paper, the background of parasitic capacitance extraction of interconnects are briefly introduced.
對互連寄生電容提取的研究背景進行了簡要的介紹。
In addition, as the result of optimizing ALU, system resources are saved and parasitic capacitance is minimized, and the aim of reducing power consumption is achieved accordingly.
另外,通過對算術邏輯單元進行優化設計,節省了系統的資源,減小了電路的寄生電容,從而達到了降低功耗的設計目标。
This paper analyses the parasitic capacitance's pattern of multi-layer cabling and delay estimation of cabling's RC tree, and puts forward research orientations in this domain.
本文研究了集成電路多層連線的寄生電容模型、互連線RC樹模型的延時估算等電路模拟技術,同時提出了今後該領域的研究方向。
We have proposed the effective capacitance model of two neighbor metals in on-chip inductors, and calculate the parasitic capacitance of serial multilayer inductors.
提出了電感中金屬間寄生電容等效模型,并且具體計算了兩種矽基串聯疊層電感的等效電容;
Electricity charges and discharges from the multi-layer cabling's parasitic capacitance when signal is transferred among different parts of integrated circuit.
通過集成電路各器件間的布線傳遞信號的過程,是将信號電荷向布線間形成的寄生電容充放電的過程。
The structure can reduce the parasitic capacitance of the sensor, improve the negative resistance characteristics of the sensitive film, and be used in micro gyroscope.
該結構降低了器件的寄生電容,改善了敏感薄膜的負阻特性,適用于共振隧穿效應陀螺。
However, to achieve capability, the device dimensions must be reduced and the parasitic capacitance and resistance must be minimized.
但是為了獲得機能,必需減小器件白勺尺寸,寄生白勺電容和電阻必需最小。
The output characteristics of the RF power LDMOS are greatly affected by the parasitic capacitance.
射頻功率LDMOS的寄生電容直接影響器件的輸出特性。
This paper introduces an inexpensive and applied resonance boosting method by using GIS bus line parasitic capacitance and reactor connected in series, and also its principle and realization.
本文介紹了一種經濟實用的利用GIS母線寄生電容串聯電抗器諧振升壓的原理及實現。
One should try to avoid running metal over poly gate. As this cause to increase in parasitic capacitance.
避免金屬在多晶矽栅上走線,會增加寄生電容。
Through using differential compensation capacitance technology, the influence of parasitic capacitance is eliminated effectively;
采用差分補償電容技術,有效地消除了寄生電容的影響;
|spurious capacitance;[電子]寄生電容
寄生電容(Parasitic Capacitance)是電子電路中非故意形成的電容現象,通常由導體、元件或電路布局之間的電場耦合引起。以下是詳細解釋:
寄生電容指電路中因物理結構或材料特性而意外産生的電容,例如導線之間、元件引腳之間或PCB層間的非設計性電容。它也被稱為雜散電容(Stray Capacitance),在高頻電路中尤為顯著。
寄生電容是電路設計中必須建模和分析的關鍵參數,尤其在射頻(RF)和集成電路領域。通過仿真工具(如SPICE)可預測其影響并優化設計。
如需進一步了解具體計算或案例,可參考電子工程教材或專業PCB設計指南。
Parasitic一詞表示寄生的含義,用于描述一種生物寄生在另一種生物體内并吸取其營養的現象,也可以用于形容人類關系中的寄生現象,例如寄生在别人的關系中,從中獲取利益而不做出相應的貢獻。
Parasitic是一個形容詞,源自于希臘語parasitos,意為“與飯伴”,由para-(旁邊)和-sitos(食物)兩部分組成。在生物學領域中,Parasitic用于描述一種生物寄生在另一種生物體内并吸取其營養的現象。在人類關系中,Parasitic則用于形容一種人類行為,即寄生在别人的關系中,從中獲取利益而不做出相應的貢獻。
Capacitance一詞表示電容的含義,用于描述電容器或電纜等電子元件的電容量大小。
Capacitance是一個名詞,源自于拉丁語capacitas,意為“容積”,由capax(寬敞)和-itas(性質)兩部分組成。在電子學領域中,Capacitance用于描述電容器或電纜等電子元件的電容量大小。電容量是指電容器中儲存的電荷量與電壓之比,通常以法拉為單位進行計量。
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